The present disclosure relates, in various embodiments, to compositions suitable for use in electronic devices, such as thin film transistors (“TFT”s). The present disclosure also relates to layers produced using such compositions and electronic devices containing such layers.
Thin film transistors (TFTs) are fundamental components in modern-age electronics, including, for example, sensors, image scanners, and electronic display devices. TFT circuits using current mainstream silicon technology may be too costly for some applications, particularly for large-area electronic devices such as backplane switching circuits for displays (e.g., active matrix liquid crystal monitors or televisions) where high switching speeds are not essential. The high costs of silicon-based TFT circuits are primarily due to the use of capital-intensive silicon manufacturing facilities as well as complex high-temperature, high-vacuum photolithographic fabrication processes under strictly controlled environments. It is generally desired to make TFTs which have not only much lower manufacturing costs, but also appealing mechanical properties such as being physically compact, lightweight, and flexible.
TFTs are generally composed of a supporting substrate, three electrically conductive electrodes (gate, source and drain electrodes), a channel semiconductor layer, and an electrically insulating gate dielectric layer separating the gate electrode from the semiconductor. The channel semiconductor is in turn in contact with the source and drain electrodes. The materials used to make the TFTs, and the interfacial properties between various layers of semiconductor, dielectric, and electrodes will affect the performance of the TFTs. Accordingly, a great deal of recent effort has been devoted to improving the TFT device performance through new materials design, optimization of interfaces, etc.
The interface between the dielectric layer and the organic semiconductor layer critically affects the performance of the TFT. The surface of the dielectric layer has been previously modified (forming a dielectric/semiconductor interfacial layer) to improve its compatibility with the semiconductor layer. Modifying the dielectric layer is difficult in a top-gate TFT structure where the semiconductor layer is deposited prior to the dielectric layer. However, a top-gate structure is preferred for many applications. Therefore, there is a need of layer, which is rather than the dielectric/semiconductor interfacial layer, to improve the device performance of a top-gate TFT.